The purpose of the proposed research and development effort is to develop a low cost/general purpose ACR-NEMA PACS interface. The long term goal of this effort is the development of an Application Specific Integrated Circuit (ASIC) implementation of the ACR-NEMA interface standard. This ASlC would contain the interface transceivers and the logic to implement the physical and datalink layers of the ACR-NEMA standard. The immediate objective of the Phase I effort is to develop a two chip set which implements the logic of the physical and datalink layers of the ACR-NEMA standard. The growing interest in PACS and the growing acceptance of the ACR- NEMA standard among radiologists, researchers and the major medical equipment manufacturers makes this development effort particularly relevant. The near term commercial availability of a two chip ACR- NEMA logic set would stimulate the development of low cost ACR-NEMA board and system level products by PACS researchers and commercial firms. The availability of an ACR-NEMA ASIC would further reduce costs at the number of ACR-NEMA systems increases.